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PDP-10 assembly language programming

This page is not limited to TOPS-20, but includes also information on other operating systems that run on the PDP-10 architecture, as there is a great deal of overlap and much PDP-10 software can run on either system with little or no modification. It may also serve as an instructive comparison between the operating system versions and hardware models to show what hardware support is required for each version.

FIXME (Some pictorial illustration would be helpful here, to lighten up an otherwise dense piece of tables and text)

Processor architecture

FIXME (A very brief historical background of the PDP-10 architecture could be useful here, just a single passage or two)

Much of the information in this section has been obtained from the following documentation:

General characteristics

The PDP-10 is originally designed for a memory with a maximum capacity of 218 or 262,144 words (this maximum has since been substantially increased; see the section on Extended addressing for details), each word holding 36 bits of data.

The processor has 16 general-purpose registers or accumulators, each also 36 bits wide, numbered from 0 to 178 (AC0–AC17). These accumulators may be addressed also as part of the main memory, meaning that an operation referring to memory cell 0000178 will actually access AC17, wherefore the contents of any accumulator can be copied to or otherwise used together with any other accumulator in a single instruction.

15 of these accumulators, AC1–AC17, may also serve as index registers; see the section on Effective address calculation for details.

The processor also has an 18-bit program counter, a set of status flags, plus a few other special registers for internal use.

Data types

The PDP-10 uses a 36-bit word format, with bits conventionally numbered 0–35 from most to least significant bit (big-endian). Portions of this word may be referenced as arbitrarily sized bytes (1–36 bits long) and used to represent smaller data types such as characters of text.

Word 11111111112222222222333333
Integer S N
Halfword LH RH
Floating point S Exponent Fraction
6-bit bytes Byte 0 Byte 1 Byte 2 Byte 3 Byte 4 Byte 5
7-bit bytes Byte 0 Byte 1 Byte 2 Byte 3 Byte 4 0
8-bit bytes Byte 0 Byte 1 Byte 2 Byte 3 0
Field Size Position Interpretation
S 1 0 0: number is positive; 1: number is negative
N 35 1–35 Two's-complement integer (excluding sign)
LH 18 0–17 Left halfword
RH 18 18–35 Right halfword
Exponent 8 1–8 Binary exponent + 128
Fraction 27 9–35 Two's complement binary fraction

As 36 is divisible by three, in PDP-10 assembly language programming integer numbers are often written in octal (base 8) rather than hexadecimal (base 16) or decimal (base 10) notation. Exceptions here are bit positions, byte sizes, and software major/minor version numbers, which are written in decimal notation. When confusion is likely, decimal integers are suffixed with a period (“.”).

Memory addresses

Effective address calculation

Word 11111111112222222222333333
Address I X Y
Field Size Position Interpretation
I 1 13 Indirect bit
X 4 14–17 Index register
Y 18 18–35 Memory address

Extended addressing

Byte pointers

Word 11111111112222222222333333
Byte pointer Position Size 0 I X Y
Field Size Position Interpretation
Position 6 0–5 First (most significant) bit of byte field
Size 6 6–11 Number of consecutive bits in byte field


Word 11111111112222222222333333
PC word Flags 0 PC
Basic instruction Basic opcode AC I X Y
I/O instruction 7 Device I/O opcode I X Y
Field Size Position Interpretation
Flags 13 0–12 See Processor status flags
PC 18 18–35 Program counter
Basic opcode 9 0–8 See Basic instruction set
AC 4 9–12 Accumulator to be used
Device 7 3–9 Input/output device unit
I/O opcode 3 10–12 See Input/output instruction set

Processor status flags

Bit Flag Function
1Carry 0
2Carry 1
3Floating overflow
4Byte interrupt
6User in-out
11Floating underflow
12No divide

Basic instruction set

Input/output instruction set

Note: I/O instructions are not available when the processor is in user mode, but can be executed only by the operating system kernel in system (privileged) mode. They are also specific to the I/O hardware architecture of the each processor's brand and model (DEC KA/KI/KL, DEC KS, SC, XKL). They are thus of limited interest to regular application programmers under most operating systems.

Interrupt system

Note: As with I/O instructions, hardware interrupts are not directly available to programs running in user mode. The operating system however provides software interrupt signals to user-mode applications.

Processor models

Processor Includes Memory size Sections I/O Front end Software
DEC KA10 8–256 KW 1 Console
DEC KI10 ?–4096 KW 1 Console
DEC KL10 ADW, FP 32–4096 KW 1 Console
DEC KL10 BDW, FP, EA 32–4096 KW 324 DTE20, 8 RH20PDP-11/?? ?–7
DEC KS10 DW, FP 128–512 KW 1 Console? ?–5
SC-40 DW, FP, EA 4–64 MW 40961 dual SX, 1 EXSPARC ?–7
XKL Toad-1DW, FP, EA ?–32 MW 4096 ?–7
XKL Toad-2DW, FP, EA ?–256 MW 4096 ?–7
DW Double word operations
FP Floating point operations
EA Extended addressing


Emulator Version Mode Includes Memory Sections Peripheral API Software
KLH102.01KL DW, FP, EA 4096 KW 32 ?–7
KLH102.01KS DW, FP ?–?

Operating system details





Documentation Operating system version
5, 5.1 6.1 7
TOPS-20 Monitor Calls User's Guide V6.1
TOPS-20 Monitor Calls Reference ManualV5.1 V7
TOPS-20 Monitor Calls Quick Reference Guide


Inline assembly code in high-level languages


  • DDT
  • SDDT
  • MDDT
tutorials/assemblers.txt · Last modified: 2023/09/23 22:22 by sm5por