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tutorials:assemblers [2022/03/14 02:43] sm5por [Processor status flags] |
tutorials:assemblers [2024/05/20 15:54] (current) sm5por [Instructions] User I/Omode |
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^ Word ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^1^1^1^1^1^1^1^1^1^1^2^2^2^2^2^2^2^2^2^2^3^3^3^3^3^3^ | ^ Word ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^1^1^1^1^1^1^1^1^1^1^2^2^2^2^2^2^2^2^2^2^3^3^3^3^3^3^ | ||
^::: | ^::: | ||
- | |Byte pointer| | + | |Address |
- | |Basic instruction| | + | |
- | |I/O instruction| | + | |
- | |PC word| Flags ||||||||||||| | + | |
^ | ^ | ||
- | |Position | ||
- | |Size | | ||
|I | |I | ||
|X | |X | ||
|Y | |Y | ||
- | |Basic opcode| | ||
- | |AC | | ||
- | |Device | ||
- | |I/O opcode | ||
- | |Flags | ||
- | |PC | 18| | ||
=== Extended addressing === | === Extended addressing === | ||
+ | |||
+ | === Byte pointers === | ||
+ | |||
+ | ^ Word ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^1^1^1^1^1^1^1^1^1^1^2^2^2^2^2^2^2^2^2^2^3^3^3^3^3^3^ | ||
+ | ^::: | ||
+ | |Byte pointer| | ||
+ | |||
+ | ^ | ||
+ | |Position | ||
+ | |Size | | ||
==== Instructions ==== | ==== Instructions ==== | ||
+ | |||
+ | ^ Word ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^1^1^1^1^1^1^1^1^1^1^2^2^2^2^2^2^2^2^2^2^3^3^3^3^3^3^ | ||
+ | ^::: | ||
+ | |PC word| Flags ||||||||||||| | ||
+ | |Basic instruction| | ||
+ | |I/O instruction| | ||
+ | |||
+ | ^ | ||
+ | |Flags | ||
+ | |PC | 18| | ||
+ | |Basic opcode| | ||
+ | |AC | | ||
+ | |Device | ||
+ | |I/O opcode | ||
+ | |||
=== Processor status flags === | === Processor status flags === | ||
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| 12|No divide | | 12|No divide | ||
- | ==== Basic instruction set ==== | + | === Basic instruction set === |
+ | |||
+ | === Input/ | ||
- | ==== Input/output instruction set ==== | + | //**Note:** I/O instructions are not available when the processor is in user mode, but can be executed only by the operating system kernel in system (privileged) mode. They are also specific to the I/O hardware architecture of the each processor' |
- | //**Note: | + | //In TOPS-20, there is a USRIO system call allowing aprivilegedprocess totemporarily enter User I/O mode (where |
==== Interrupt system ==== | ==== Interrupt system ==== | ||
Line 96: | Line 112: | ||
==== Processor models ==== | ==== Processor models ==== | ||
- | ^ Processor | + | ^ Processor |
- | ^::: ^::: | + | ^::: |
- | |DEC KA10 | + | |DEC KA10 | | 8--256 KW| 1| |
- | |DEC KI10 | + | |DEC KI10 | | ?--4096 KW| 1| |
- | |DEC KL10 A | + | |DEC KL10 A|DW, FP |
- | |DEC KL10 B | + | |DEC KL10 B|DW, FP, EA| 32--4096 KW| 32|4 DTE20, 8 RH20|PDP-11/?? |
- | |DEC KS10 |FlPt | + | |DEC KS10 |DW, FP | 128--512 KW| |
- | |XKL Toad | + | |SC-40 |DW, FP, EA| 4--64 MW| 4096|1 dual SX, 1 EX|SPARC |
+ | |XKL Toad-1|DW, FP, EA| ?--32 MW| 4096| | | ||
+ | |XKL Toad-2|DW, FP, EA| ?--256 MW| 4096| | ||
- | |FlPt | + | |DW |Double word operations |
- | |ExtA | + | |FP |
+ | |EA | ||
- | ==== Emulators | + | === Emulators === |
- | | + | ^ Emulator |
- | | + | ^::: ^::: ^::: |
+ | |KLH10|2.01|KL | ||
+ | |KLH10|2.01|KS | ||
+ | |KLH10|2.01|KS ITS|DW, FP | | ||
+ | |SIMH | |KL |DW, FP, EA| | ||
===== Operating system details ===== | ===== Operating system details ===== |