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tutorials:assemblers [2022/03/13 11:11]
sm5por [Processor architecture] 		tutorials:assemblers [2023/09/23 22:22] (current)
sm5por [Instructions]
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 **//This page is not limited to TOPS-20, but includes also information on other operating systems that run on the PDP-10 architecture, as there is a great deal of overlap and much PDP-10 software can run on either system with little or no modification. It may also serve as an instructive comparison between the operating system versions and hardware models to show what hardware support is required for each version.//** **//This page is not limited to TOPS-20, but includes also information on other operating systems that run on the PDP-10 architecture, as there is a great deal of overlap and much PDP-10 software can run on either system with little or no modification. It may also serve as an instructive comparison between the operating system versions and hardware models to show what hardware support is required for each version.//**
  
-FIXME //(Some pictorial illustration would be helpful here, to lighten up an otherwise dense piece of tables and text))//+FIXME //(Some pictorial illustration would be helpful here, to lighten up an otherwise dense piece of tables and text)//
 ===== Processor architecture ===== ===== Processor architecture =====
  
-FIXME //(A very brief historical background of the PDP-10 architecture could be useful here, just a single passage or two))//+FIXME //(A very brief historical background of the PDP-10 architecture could be useful here, just a single passage or two)//
  
 Much of the information in this section has been obtained from the following documentation: Much of the information in this section has been obtained from the following documentation:
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   * [[http://bitsavers.trailing-edge.com/pdf/dec/pdp10/1982_ProcRefMan.pdf|DECsystem-10/DECSYSTEM-20 Processor Reference Manual]] (1982)   * [[http://bitsavers.trailing-edge.com/pdf/dec/pdp10/1982_ProcRefMan.pdf|DECsystem-10/DECSYSTEM-20 Processor Reference Manual]] (1982)
  
 +==== General characteristics ====
 +
 +The PDP-10 is originally designed for a memory with a maximum capacity of 2<sup>18</sup> or 262,144 //words// (this maximum has since been substantially increased; see the section on //Extended addressing// for details), each word holding 36 bits of data.
 +
 +The processor has 16 general-purpose registers or //accumulators,// each also 36 bits wide, numbered from 0 to 17<sub>8</sub> (AC0--AC17). These accumulators may be addressed also as part of the main memory, meaning that an operation referring to memory cell 000017<sub>8</sub> will actually access AC17, wherefore the contents of any accumulator can be copied to or otherwise used together with any other accumulator in a single instruction.
 +
 +15 of these accumulators, AC1--AC17, may also serve as //index registers;// see the section on //Effective address calculation// for details.
 +
 +The processor also has an 18-bit //program counter,// a set of //status flags,// plus a few other special registers for internal use.
 ==== Data types ==== ==== Data types ====
  
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 |Exponent |       8|    1--8    |Binary exponent + 128                       | |Exponent |       8|    1--8    |Binary exponent + 128                       |
 |Fraction |      27|    9--35   |Two's complement binary fraction            | |Fraction |      27|    9--35   |Two's complement binary fraction            |
 +
 +As 36 is divisible by three, in PDP-10 assembly language programming integer numbers are often written in octal (base 8) rather than hexadecimal (base 16) or decimal (base 10) notation. Exceptions here are bit positions, byte sizes, and software major/minor version numbers, which are written in decimal notation. When confusion is likely, decimal integers are suffixed with a period (".").
 +
 +==== Memory addresses ====
 +
 +=== Effective address calculation ===
 +
 +^  Word  ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^1^1^1^1^1^1^1^1^1^1^2^2^2^2^2^2^2^2^2^2^3^3^3^3^3^3^
 +^:::     ^0^1^2^3^4^5^6^7^8^9^0^1^2^3^4^5^6^7^8^9^0^1^2^3^4^5^6^7^8^9^0^1^2^3^4^5^
 +|Address | |||||||||||||  I  |  X  ||||  Y  ||||||||||||||||||
 +
 +^   Field    ^  Size  ^  Position  ^  Interpretation                          ^
 +|I           |       1|     13     |Indirect bit                              |
 +|X           |       4|   14--17   |Index register                            |
 +|Y           |      18|   18--35   |Memory address                            |
 +
 +=== Extended addressing ===
 +
 +=== Byte pointers ===
  
 ^  Word  ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^1^1^1^1^1^1^1^1^1^1^2^2^2^2^2^2^2^2^2^2^3^3^3^3^3^3^ ^  Word  ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^1^1^1^1^1^1^1^1^1^1^2^2^2^2^2^2^2^2^2^2^3^3^3^3^3^3^
 ^:::     ^0^1^2^3^4^5^6^7^8^9^0^1^2^3^4^5^6^7^8^9^0^1^2^3^4^5^6^7^8^9^0^1^2^3^4^5^ ^:::     ^0^1^2^3^4^5^6^7^8^9^0^1^2^3^4^5^6^7^8^9^0^1^2^3^4^5^6^7^8^9^0^1^2^3^4^5^
 |Byte pointer|  Position  ||||||  Size  ||||||0|  I  |  X  ||||  Y  |||||||||||||||||| |Byte pointer|  Position  ||||||  Size  ||||||0|  I  |  X  ||||  Y  ||||||||||||||||||
-|Basic instruction|  Basic opcode  |||||||||  AC  ||||  I  |  X  ||||  Y  |||||||||||||||||| 
-|I/O instruction|  7  |||  Device  |||||||  I/O opcode  |||  I  |  X  ||||  Y  |||||||||||||||||| 
-|PC word|  Flags  |||||||||||||  0  |||||  PC  |||||||||||||||||| 
  
-^   Field    ^  Size  ^  Position  ^  Interpretation                                 ^ +^   Field    ^  Size  ^  Position  ^  Interpretation                          ^ 
-|Position    |       6|    0--5    |First (most significant) bit of byte field       | +|Position    |       6|    0--5    |First (most significant) bit of byte field| 
-|Size        |       6|    6--11   |Number of consecutive bits in byte field         | +|Size        |       6|    6--11   |Number of consecutive bits in byte field  |
-|I           |       1|     13     |Indirect bit; see effective address calculation  | +
-|X           |       4|   14--17   |Index register; see effective address calculation| +
-|Y           |      18|   18--35   |Memory address                                   | +
-|Basic opcode|       9|    0--8    |See basic instruction set                        | +
-|I/O opcode  |       7|    3--9    |See input/output instruction set                 | +
-|AC          |       4|    9--12   |Accumulator to be used                           | +
-|Flags       |      13|    0--12   |See processor status flags                       | +
-|PC          |      18|   18--35   |Program counter                                  |+
  
-As 36 is divisible by three, in PDP-10 assembly language programming integer numbers are often written in octal (base 8) rather than hexadecimal (base 16) or decimal (base 10) notation. Exceptions here are bit positions, byte sizes, and software major/minor version numbers, which are written in decimal notation. When confusion is likely, decimal integers are suffixed with a period (".").+==== Instructions ====
  
-==== Effective address calculation ====+^  Word  ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^1^1^1^1^1^1^1^1^1^1^2^2^2^2^2^2^2^2^2^2^3^3^3^3^3^3^ 
 +^:::     ^0^1^2^3^4^5^6^7^8^9^0^1^2^3^4^5^6^7^8^9^0^1^2^3^4^5^6^7^8^9^0^1^2^3^4^5^ 
 +|PC word|  Flags  |||||||||||||  0  |||||  PC  |||||||||||||||||| 
 +|Basic instruction|  Basic opcode  |||||||||  AC  ||||  I  |  X  ||||  Y  |||||||||||||||||| 
 +|I/O instruction|  7  |||  Device  |||||||  I/O opcode  |||  I  |  X  ||||  Y  ||||||||||||||||||
  
-==== Extended addressing ====+^   Field    ^  Size  ^  Position  ^  Interpretation                          ^ 
 +|Flags       |      13|    0--12   |See //Processor status flags//            | 
 +|PC          |      18|   18--35   |Program counter                           | 
 +|Basic opcode|       9|    0--8    |See //Basic instruction set//             | 
 +|AC          |       4|    9--12   |Accumulator to be used                    | 
 +|Device      |       7|    3--9    |Input/output device unit                  | 
 +|I/O opcode  |       3|   10--12   |See //Input/output instruction set//      |
  
-==== Processor status flags ====+=== Processor status flags ===
  
 ^  Bit  ^       Flag        ^  Function  ^ ^  Bit  ^       Flag        ^  Function  ^
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 |     12|No divide          |            | |     12|No divide          |            |
  
-==== Basic instruction set ====+=== Basic instruction set ===
  
-==== Input/output instruction set ====+=== Input/output instruction set ===
  
-//**Note:** I/O instructions are not available when the processor is in user mode, but can be executed only by the operating system kernel in system (privileged) mode. They are thus of limited interest to regular application programmers under most operating systems.//+//**Note:** I/O instructions are not available when the processor is in user mode, but can be executed only by the operating system kernel in system (privileged) mode. They are also specific to the I/O hardware architecture of the each processor's brand and model (DEC KA/KI/KL, DEC KS, SC, XKL). They are thus of limited interest to regular application programmers under most operating systems.//
  
 ==== Interrupt system ==== ==== Interrupt system ====
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 ==== Processor models ==== ==== Processor models ====
  
-^  Processor  ^  Includes  ^  Memory size  ^  I/O   ^Front end^         Operating systems          ^^^^ +^  Processor  ^  Includes  ^  Memory size  ^  Sections  ^  I/O  ^  Front end  ^  Software  ^^^^ 
-^:::          ^:::         ^:::            ^:::     ^:::      ^ Tops-10 ^   ITS   ^  TENEX  ^ TOPS-20 ^ +^:::       ^:::       ^:::          ^:::   ^:::            ^:::      ^ Tops-10 ^  ITS  ^ TENEX ^ TOPS-20 ^ 
-|DEC KA10     |            |   8--256 KW   |        |         |         |         |         |   ---   | +|DEC KA10  |          |    8--256 KW|     1|               |Console  |        |        |        |   ---  | 
-|DEC KI10     |            |               |        |         |         |         |         |   ---   | +|DEC KI10  |          |   ?--4096 KW|     1|               |Console  |        |        |        |   ---  | 
-|DEC KL10 A   |FlPt        |               |        |Console  |         |         |         |         | +|DEC KL10 A|DW, FP    |  32--4096 KW|     1|               |Console  |        |        |        |        | 
-|DEC KL10 B   |FlPt, ExtA  |               |MASSBUS?|PDP-11/??|         |         |         |  ?--7   | +|DEC KL10 B|DW, FP, EA|  32--4096 KW|    32|4 DTE20, 8 RH20|PDP-11/??|        |        |        |  ?--7  | 
-|DEC KS10     |FlPt        |               |        |         |         |         |         |  ?--5   | +|DEC KS10  |DW, FP    |  128--512 KW|     1|               |Console? |        |        |        |  ?--5  | 
-|XKL Toad     |FlPt, ExtA  |   256 MW (?)  |        |         |         |         |         |  ?--7   |+|SC-40     |DW, FP, EA|     4--64 MW|  4096|1 dual SX, 1 EX|SPARC    |        |        |        |  ?--7  | 
 +|XKL Toad-1|DW, FP, EA|     ?--32 MW|  4096|               |         |        |        |        |  ?--7  | 
 +|XKL Toad-2|DW, FP, EA|    ?--256 MW|  4096|               |         |        |        |        |  ?--7  |
  
-|FlPt  |Floating point operations  | +|DW  |Double word operations     | 
-|ExtA  |Extended addressing        |+|FP  |Floating point operations  | 
 +|EA  |Extended addressing        |
  
-==== Emulators ====+=== Emulators ===
  
-  * KLH10 +^  Emulator  ^  Version  ^  Mode  ^  Includes  ^  Memory  ^  Sections  ^  Peripheral API  ^  Software  ^^^^ 
-  * SIMH+^:::  ^::: ^:::   ^:::       ^:::      ^:::   ^::: ^ Tops-10 ^  ITS   ^  TENEX ^ TOPS-20 ^ 
 +|KLH10|2.01|KL    |DW, FP, EA|  4096 KW|    32|    |         |        |        |  ?--7   | 
 +|KLH10|2.01|KS    |DW, FP    |         |      |    |         |        |        |  ?--?   | 
 +|KLH10|2.01|KS ITS|DW, FP    |         |      |    |         |        |        |         | 
 +|SIMH |    |KL    |DW, FP, EA|         |      |    |         |        |        |  ?--7   |
  
 ===== Operating system details ===== ===== Operating system details =====
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 ===== Assemblers ===== ===== Assemblers =====
  
-  * [[tutorials:macro|MACRO-10]] +  * [[tutorials:MACRO]] 
-  * [[tutorials:midas|MIDAS]] +  * [[tutorials:MIDAS]] 
-  * [[tutorials:fail|FAIL]]+  * [[tutorials:FAIL]]
  
-==== High-level languages with support for inline machine instructions ====+==== Inline assembly code in high-level languages ====
  
   * [[tutorials:maclisp|MACLISP]]   * [[tutorials:maclisp|MACLISP]]
tutorials/assemblers.1647169912.txt.gz · Last modified: 2022/03/13 11:11 by sm5por

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