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tutorials:assemblers [2022/03/13 11:11] sm5por [Processor architecture] |
tutorials:assemblers [2023/09/23 22:22] sm5por [Instructions] |
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**//This page is not limited to TOPS-20, but includes also information on other operating systems that run on the PDP-10 architecture, | **//This page is not limited to TOPS-20, but includes also information on other operating systems that run on the PDP-10 architecture, | ||
- | FIXME //(Some pictorial illustration would be helpful here, to lighten up an otherwise dense piece of tables and text))// | + | FIXME //(Some pictorial illustration would be helpful here, to lighten up an otherwise dense piece of tables and text)// |
===== Processor architecture ===== | ===== Processor architecture ===== | ||
- | FIXME //(A very brief historical background of the PDP-10 architecture could be useful here, just a single passage or two))// | + | FIXME //(A very brief historical background of the PDP-10 architecture could be useful here, just a single passage or two)// |
Much of the information in this section has been obtained from the following documentation: | Much of the information in this section has been obtained from the following documentation: | ||
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* [[http:// | * [[http:// | ||
+ | ==== General characteristics ==== | ||
+ | |||
+ | The PDP-10 is originally designed for a memory with a maximum capacity of 2< | ||
+ | |||
+ | The processor has 16 general-purpose registers or // | ||
+ | |||
+ | 15 of these accumulators, | ||
+ | |||
+ | The processor also has an 18-bit //program counter,// a set of //status flags,// plus a few other special registers for internal use. | ||
==== Data types ==== | ==== Data types ==== | ||
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|Exponent | | |Exponent | | ||
|Fraction | 27| 9--35 | |Fraction | 27| 9--35 | ||
+ | |||
+ | As 36 is divisible by three, in PDP-10 assembly language programming integer numbers are often written in octal (base 8) rather than hexadecimal (base 16) or decimal (base 10) notation. Exceptions here are bit positions, byte sizes, and software major/minor version numbers, which are written in decimal notation. When confusion is likely, decimal integers are suffixed with a period (" | ||
+ | |||
+ | ==== Memory addresses ==== | ||
+ | |||
+ | === Effective address calculation === | ||
+ | |||
+ | ^ Word ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^1^1^1^1^1^1^1^1^1^1^2^2^2^2^2^2^2^2^2^2^3^3^3^3^3^3^ | ||
+ | ^::: | ||
+ | |Address | ||||||||||||| | ||
+ | |||
+ | ^ | ||
+ | |I | ||
+ | |X | ||
+ | |Y | ||
+ | |||
+ | === Extended addressing === | ||
+ | |||
+ | === Byte pointers === | ||
^ Word ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^1^1^1^1^1^1^1^1^1^1^2^2^2^2^2^2^2^2^2^2^3^3^3^3^3^3^ | ^ Word ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^1^1^1^1^1^1^1^1^1^1^2^2^2^2^2^2^2^2^2^2^3^3^3^3^3^3^ | ||
^::: | ^::: | ||
|Byte pointer| | |Byte pointer| | ||
- | |Basic instruction| | ||
- | |I/O instruction| | ||
- | |PC word| Flags ||||||||||||| | ||
- | ^ | + | ^ |
- | |Position | + | |Position |
- | |Size | | + | |Size | |
- | |I | + | |
- | |X | + | |
- | |Y | + | |
- | |Basic opcode| | + | |
- | |I/O opcode | + | |
- | |AC | | + | |
- | |Flags | + | |
- | |PC | 18| | + | |
- | As 36 is divisible by three, in PDP-10 assembly language programming integer numbers are often written in octal (base 8) rather than hexadecimal (base 16) or decimal (base 10) notation. Exceptions here are bit positions, byte sizes, and software major/minor version numbers, which are written in decimal notation. When confusion is likely, decimal integers are suffixed with a period (" | + | ==== Instructions ==== |
- | ==== Effective address calculation ==== | + | ^ Word ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^1^1^1^1^1^1^1^1^1^1^2^2^2^2^2^2^2^2^2^2^3^3^3^3^3^3^ |
+ | ^::: | ||
+ | |PC word| Flags ||||||||||||| | ||
+ | |Basic instruction| | ||
+ | |I/O instruction| | ||
- | ==== Extended addressing ==== | + | ^ |
+ | |Flags | ||
+ | |PC | 18| | ||
+ | |Basic opcode| | ||
+ | |AC | | ||
+ | |Device | ||
+ | |I/O opcode | ||
- | ==== Processor status flags ==== | + | === Processor status flags === |
^ Bit ^ | ^ Bit ^ | ||
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| 12|No divide | | 12|No divide | ||
- | ==== Basic instruction set ==== | + | === Basic instruction set === |
- | ==== Input/ | + | === Input/ |
- | //**Note:** I/O instructions are not available when the processor is in user mode, but can be executed only by the operating system kernel in system (privileged) mode. They are thus of limited interest to regular application programmers under most operating systems.// | + | //**Note:** I/O instructions are not available when the processor is in user mode, but can be executed only by the operating system kernel in system (privileged) mode. They are also specific to the I/O hardware architecture of the each processor' |
==== Interrupt system ==== | ==== Interrupt system ==== | ||
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==== Processor models ==== | ==== Processor models ==== | ||
- | ^ Processor | + | ^ Processor |
- | ^::: ^::: | + | ^::: |
- | |DEC KA10 | + | |DEC KA10 | | 8--256 KW| 1| |
- | |DEC KI10 | + | |DEC KI10 | | ?--4096 KW| 1| |
- | |DEC KL10 A | + | |DEC KL10 A|DW, FP |
- | |DEC KL10 B | + | |DEC KL10 B|DW, FP, EA| 32--4096 KW| 32|4 DTE20, 8 RH20|PDP-11/?? |
- | |DEC KS10 |FlPt | + | |DEC KS10 |DW, FP | 128--512 KW| |
- | |XKL Toad | + | |SC-40 |DW, FP, EA| 4--64 MW| 4096|1 dual SX, 1 EX|SPARC |
+ | |XKL Toad-1|DW, FP, EA| ?--32 MW| 4096| | | ||
+ | |XKL Toad-2|DW, FP, EA| ?--256 MW| 4096| | ||
- | |FlPt | + | |DW |Double word operations |
- | |ExtA | + | |FP |
+ | |EA | ||
- | ==== Emulators | + | === Emulators === |
- | | + | ^ Emulator |
- | | + | ^::: ^::: ^::: |
+ | |KLH10|2.01|KL | ||
+ | |KLH10|2.01|KS | ||
+ | |KLH10|2.01|KS ITS|DW, FP | | ||
+ | |SIMH | |KL |DW, FP, EA| | ||
===== Operating system details ===== | ===== Operating system details ===== | ||
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===== Assemblers ===== | ===== Assemblers ===== | ||
- | * [[tutorials: | + | * [[tutorials: |
- | * [[tutorials: | + | * [[tutorials: |
- | * [[tutorials: | + | * [[tutorials: |
- | ==== High-level languages | + | ==== Inline assembly code in high-level languages ==== |
* [[tutorials: | * [[tutorials: |